1. Field of the Invention
This invention relates to a method for forming a non-volatile memory, and more particularly to a method for forming a floating gate electrode.
2. Description of the Prior Art
Conventionally known is a non-volatile memory having a floating gate electrode arranged therein, said floating gate electrode being formed by laminating on a silicon substrate either a polysilicon layer or by alternatingly laminating a polysilicon layer and a tungsten silicide layer with a tunnel oxide sandwiched between said substrate and said polysilicon layer.
As a method for forming a floating gate electrode formed by laminating a polysilicon layer or by alternatingly laminating a polysilicon and a tungsten silicide layer with a tunnel oxide sandwiched between said substrate and said polysilicon layer, known is a method wherein a tungsten silicide layer is laminated on a polysilicon layer with a CVD technique of reducing WF.sub.6 gas with SiH.sub.4 gas at 300.degree. C. to 400.degree. C. under reduced pressure.
In a conventional method for forming a floating gate electrode formed by alternatingly laminating a polysilicon layer and a tungsten silicide layer, the laminated electrode has approximately 1/10 of the specific resistance compared to a floating gate electrode formed of only a polysilicon layer. Thus the laminated floating gate electrode is favorably used in devices that require a high response speed compared to the response speed of devices having floating gate electrodes formed of only a polysilicon layer. However, even such a laminated floating gate electrode formed by alternatingly laminating a polysilicon layer and a tungsten silicide layer is liable to tear at the tunnel oxide because of to the operation of rewriting memory contents.